drivers/video/display/jbt6k74.c

   1 /* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
   2  *
   3  * Copyright (C) 2006-2007 by Openmoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>,
   5  *         Stefan Schmidt <stefan@openmoko.org>
   6  * Copyright (C) 2008 by Harald Welte <laforge@openmoko.org>
   7  * All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/types.h>
  28 #include <linux/module.h>
  29 #include <linux/device.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/delay.h>
  32 #include <linux/jbt6k74.h>
  33 #include <linux/fb.h>
  34
  35 enum jbt_register {
  36         JBT_REG_SLEEP_IN                = 0x10,
  37         JBT_REG_SLEEP_OUT               = 0x11,
  38
  39         JBT_REG_DISPLAY_OFF             = 0x28,
  40         JBT_REG_DISPLAY_ON              = 0x29,
  41
  42         JBT_REG_RGB_FORMAT              = 0x3a,
  43         JBT_REG_QUAD_RATE               = 0x3b,
  44
  45         JBT_REG_POWER_ON_OFF            = 0xb0,
  46         JBT_REG_BOOSTER_OP              = 0xb1,
  47         JBT_REG_BOOSTER_MODE            = 0xb2,
  48         JBT_REG_BOOSTER_FREQ            = 0xb3,
  49         JBT_REG_OPAMP_SYSCLK            = 0xb4,
  50         JBT_REG_VSC_VOLTAGE             = 0xb5,
  51         JBT_REG_VCOM_VOLTAGE            = 0xb6,
  52         JBT_REG_EXT_DISPL               = 0xb7,
  53         JBT_REG_OUTPUT_CONTROL          = 0xb8,
  54         JBT_REG_DCCLK_DCEV              = 0xb9,
  55         JBT_REG_DISPLAY_MODE1           = 0xba,
  56         JBT_REG_DISPLAY_MODE2           = 0xbb,
  57         JBT_REG_DISPLAY_MODE            = 0xbc,
  58         JBT_REG_ASW_SLEW                = 0xbd,
  59         JBT_REG_DUMMY_DISPLAY           = 0xbe,
  60         JBT_REG_DRIVE_SYSTEM            = 0xbf,
  61
  62         JBT_REG_SLEEP_OUT_FR_A          = 0xc0,
  63         JBT_REG_SLEEP_OUT_FR_B          = 0xc1,
  64         JBT_REG_SLEEP_OUT_FR_C          = 0xc2,
  65         JBT_REG_SLEEP_IN_LCCNT_D        = 0xc3,
  66         JBT_REG_SLEEP_IN_LCCNT_E        = 0xc4,
  67         JBT_REG_SLEEP_IN_LCCNT_F        = 0xc5,
  68         JBT_REG_SLEEP_IN_LCCNT_G        = 0xc6,
  69
  70         JBT_REG_GAMMA1_FINE_1           = 0xc7,
  71         JBT_REG_GAMMA1_FINE_2           = 0xc8,
  72         JBT_REG_GAMMA1_INCLINATION      = 0xc9,
  73         JBT_REG_GAMMA1_BLUE_OFFSET      = 0xca,
  74
  75         /* VGA */
  76         JBT_REG_BLANK_CONTROL           = 0xcf,
  77         JBT_REG_BLANK_TH_TV             = 0xd0,
  78         JBT_REG_CKV_ON_OFF              = 0xd1,
  79         JBT_REG_CKV_1_2                 = 0xd2,
  80         JBT_REG_OEV_TIMING              = 0xd3,
  81         JBT_REG_ASW_TIMING_1            = 0xd4,
  82         JBT_REG_ASW_TIMING_2            = 0xd5,
  83
  84         /* QVGA */
  85         JBT_REG_BLANK_CONTROL_QVGA      = 0xd6,
  86         JBT_REG_BLANK_TH_TV_QVGA        = 0xd7,
  87         JBT_REG_CKV_ON_OFF_QVGA         = 0xd8,
  88         JBT_REG_CKV_1_2_QVGA            = 0xd9,
  89         JBT_REG_OEV_TIMING_QVGA         = 0xde,
  90         JBT_REG_ASW_TIMING_1_QVGA       = 0xdf,
  91         JBT_REG_ASW_TIMING_2_QVGA       = 0xe0,
  92
  93
  94         JBT_REG_HCLOCK_VGA              = 0xec,
  95         JBT_REG_HCLOCK_QVGA             = 0xed,
  96
  97 };
  98
  99 enum jbt_state {
 100         JBT_STATE_DEEP_STANDBY,
 101         JBT_STATE_SLEEP,
 102         JBT_STATE_NORMAL,
 103         JBT_STATE_QVGA_NORMAL,
 104 };
 105
 106 static const char *jbt_state_names[] = {
 107         [JBT_STATE_DEEP_STANDBY]        = "deep-standby",
 108         [JBT_STATE_SLEEP]               = "sleep",
 109         [JBT_STATE_NORMAL]              = "normal",
 110         [JBT_STATE_QVGA_NORMAL]         = "qvga-normal",
 111 };
 112
 113 struct jbt_info {
 114         enum jbt_state state, last_state;
 115         struct spi_device *spi_dev;
 116         struct mutex lock;              /* protects tx_buf and reg_cache */
 117         struct notifier_block fb_notif;
 118         u16 tx_buf[8];
 119         u16 reg_cache[0xEE];
 120         int have_resumed;
 121 };
 122
 123 #define JBT_COMMAND     0x000
 124 #define JBT_DATA        0x100
 125
 126
 127 static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg)
 128 {
 129         int rc;
 130
 131         mutex_lock(&jbt->lock);
 132
 133         jbt->tx_buf[0] = JBT_COMMAND | reg;
 134         rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 135                        1*sizeof(u16));
 136         if (rc == 0)
 137                 jbt->reg_cache[reg] = 0;
 138         else
 139                 printk(KERN_ERR"jbt_reg_write_nodata spi_write ret %d\n",
 140                        rc);
 141
 142         mutex_unlock(&jbt->lock);
 143
 144         return rc;
 145 }
 146
 147
 148 static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data)
 149 {
 150         int rc;
 151
 152         mutex_lock(&jbt->lock);
 153
 154         jbt->tx_buf[0] = JBT_COMMAND | reg;
 155         jbt->tx_buf[1] = JBT_DATA | data;
 156         rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 157                        2*sizeof(u16));
 158         if (rc == 0)
 159                 jbt->reg_cache[reg] = data;
 160         else
 161                 printk(KERN_ERR"jbt_reg_write spi_write ret %d\n", rc);
 162
 163         mutex_unlock(&jbt->lock);
 164
 165         return rc;
 166 }
 167
 168 static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data)
 169 {
 170         int rc;
 171
 172         mutex_lock(&jbt->lock);
 173
 174         jbt->tx_buf[0] = JBT_COMMAND | reg;
 175         jbt->tx_buf[1] = JBT_DATA | (data >> 8);
 176         jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
 177
 178         rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 179                        3*sizeof(u16));
 180         if (rc == 0)
 181                 jbt->reg_cache[reg] = data;
 182         else
 183                 printk(KERN_ERR"jbt_reg_write16 spi_write ret %d\n", rc);
 184
 185         mutex_unlock(&jbt->lock);
 186
 187         return rc;
 188 }
 189
 190 static int jbt_init_regs(struct jbt_info *jbt, int qvga)
 191 {
 192         int rc;
 193
 194         dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n", qvga ? 'Q' : ' ');
 195
 196         rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
 197         rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
 198         rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
 199         rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
 200         rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
 201         rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
 202         rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
 203         rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
 204         rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
 205         rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
 206         rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
 207         rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
 208         /*
 209          * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
 210          * to avoid red / blue flicker
 211          */
 212         rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04);
 213         rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
 214
 215         rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
 216         rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
 217         rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
 218         rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
 219         rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
 220         rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
 221         rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
 222
 223         rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
 224         rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
 225         rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
 226         rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
 227
 228         if (!qvga) {
 229                 rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
 230                 rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
 231                 rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
 232
 233                 rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
 234                 rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
 235
 236                 rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
 237                 rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
 238                 rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
 239         } else {
 240                 rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
 241                 rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
 242                 rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
 243
 244                 rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
 245                 rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
 246
 247                 rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
 248                 rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
 249                 rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
 250         }
 251
 252         return rc ? -EIO : 0;
 253 }
 254
 255 int jbt6k74_display_onoff(struct jbt_info *jbt, int on)
 256 {
 257         if (on)
 258                 return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
 259         else
 260                 return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
 261 }
 262 EXPORT_SYMBOL_GPL(jbt6k74_display_onoff);
 263
 264 static int standby_to_sleep(struct jbt_info *jbt)
 265 {
 266     static int once = 0;
 267     if (!once++) {
 268         int rc;
 269
 270         /* three times command zero */
 271         rc = jbt_reg_write_nodata(jbt, 0x00);
 272         mdelay(1);
 273         rc |= jbt_reg_write_nodata(jbt, 0x00);
 274         mdelay(1);
 275         rc |= jbt_reg_write_nodata(jbt, 0x00);
 276         mdelay(1);
 277
 278         /* deep standby out */
 279         rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17);
 280
 281         return rc ? -EIO : 0;
 282     }
 283     else
 284         return 0;
 285 }
 286
 287 static int sleep_to_normal(struct jbt_info *jbt)
 288 {
 289         int rc;
 290
 291         /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
 292         rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
 293
 294         /* Quad mode off */
 295         rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
 296
 297         /* AVDD on, XVDD on */
 298         rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
 299
 300         /* Output control */
 301         rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
 302
 303         /* Sleep mode off */
 304         rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
 305
 306         /* initialize register set */
 307         rc |= jbt_init_regs(jbt, 0);
 308
 309         /* Turn on display */
 310         rc |= jbt6k74_display_onoff(jbt, 1);
 311
 312         return rc ? -EIO : 0;
 313 }
 314
 315 static int sleep_to_qvga_normal(struct jbt_info *jbt)
 316 {
 317         int rc;
 318
 319         /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
 320         rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
 321
 322         /* Quad mode on */
 323         rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
 324
 325         /* AVDD on, XVDD on */
 326         rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
 327
 328         /* Output control */
 329         rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
 330
 331         /* Sleep mode off */
 332         rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
 333
 334         /* initialize register set for qvga*/
 335         rc |= jbt_init_regs(jbt, 1);
 336
 337         /* Turn on display */
 338         rc |= jbt6k74_display_onoff(jbt, 1);
 339
 340         return rc ? -EIO : 0;
 341 }
 342
 343 static int normal_to_sleep(struct jbt_info *jbt)
 344 {
 345         int rc;
 346
 347         rc = jbt6k74_display_onoff(jbt, 0);
 348         rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
 349         rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
 350         rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
 351
 352         return rc ? -EIO : 0;
 353 }
 354
 355 static int sleep_to_standby(struct jbt_info *jbt)
 356 {
 357 #if 0
 358         return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
 359 #else
 360     return 0;
 361 #endif
 362 }
 363
 364 /* frontend function */
 365 int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state)
 366 {
 367         int rc = -EINVAL;
 368
 369         dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%u, "
 370                 "new_state=%u)\n", jbt->state, new_state);
 371
 372         switch (jbt->state) {
 373         case JBT_STATE_DEEP_STANDBY:
 374                 switch (new_state) {
 375                 case JBT_STATE_DEEP_STANDBY:
 376                         rc = 0;
 377                         break;
 378                 case JBT_STATE_SLEEP:
 379                         rc = standby_to_sleep(jbt);
 380                         break;
 381                 case JBT_STATE_NORMAL:
 382                         /* first transition into sleep */
 383                         rc = standby_to_sleep(jbt);
 384                         /* then transition into normal */
 385                         rc |= sleep_to_normal(jbt);
 386                         break;
 387                 case JBT_STATE_QVGA_NORMAL:
 388                         /* first transition into sleep */
 389                         rc = standby_to_sleep(jbt);
 390                         /* then transition into normal */
 391                         rc |= sleep_to_qvga_normal(jbt);
 392                         break;
 393                 }
 394                 break;
 395         case JBT_STATE_SLEEP:
 396                 switch (new_state) {
 397                 case JBT_STATE_SLEEP:
 398                         rc = 0;
 399                         break;
 400                 case JBT_STATE_DEEP_STANDBY:
 401                         rc = sleep_to_standby(jbt);
 402                         break;
 403                 case JBT_STATE_NORMAL:
 404                         rc = sleep_to_normal(jbt);
 405                         break;
 406                 case JBT_STATE_QVGA_NORMAL:
 407                         rc = sleep_to_qvga_normal(jbt);
 408                         break;
 409                 }
 410                 break;
 411         case JBT_STATE_NORMAL:
 412                 switch (new_state) {
 413                 case JBT_STATE_NORMAL:
 414                         rc = 0;
 415                         break;
 416                 case JBT_STATE_DEEP_STANDBY:
 417                         /* first transition into sleep */
 418                         rc = normal_to_sleep(jbt);
 419                         /* then transition into deep standby */
 420                         rc |= sleep_to_standby(jbt);
 421                         break;
 422                 case JBT_STATE_SLEEP:
 423                         rc = normal_to_sleep(jbt);
 424                         break;
 425                 case JBT_STATE_QVGA_NORMAL:
 426                         /* first transition into sleep */
 427                         rc = normal_to_sleep(jbt);
 428                         /* second transition into deep standby */
 429                         rc |= sleep_to_standby(jbt);
 430                         /* third transition into sleep */
 431                         rc |= standby_to_sleep(jbt);
 432                         /* fourth transition into normal */
 433                         rc |= sleep_to_qvga_normal(jbt);
 434                         break;
 435                 }
 436                 break;
 437         case JBT_STATE_QVGA_NORMAL:
 438                 switch (new_state) {
 439                 case JBT_STATE_QVGA_NORMAL:
 440                         rc = 0;
 441                         break;
 442                 case JBT_STATE_DEEP_STANDBY:
 443                         /* first transition into sleep */
 444                         rc = normal_to_sleep(jbt);
 445                         /* then transition into deep standby */
 446                         rc |= sleep_to_standby(jbt);
 447                         break;
 448                 case JBT_STATE_SLEEP:
 449                         rc = normal_to_sleep(jbt);
 450                         break;
 451                 case JBT_STATE_NORMAL:
 452                         /* first transition into sleep */
 453                         rc = normal_to_sleep(jbt);
 454                         /* second transition into deep standby */
 455                         rc |= sleep_to_standby(jbt);
 456                         /* third transition into sleep */
 457                         rc |= standby_to_sleep(jbt);
 458                         /* fourth transition into normal */
 459                         rc |= sleep_to_normal(jbt);
 460                         break;
 461                 }
 462                 break;
 463         }
 464
 465         if (rc == 0)
 466                 jbt->state = new_state;
 467
 468         return rc;
 469 }
 470 EXPORT_SYMBOL_GPL(jbt6k74_enter_state);
 471
 472 static ssize_t state_read(struct device *dev, struct device_attribute *attr,
 473                           char *buf)
 474 {
 475         struct jbt_info *jbt = dev_get_drvdata(dev);
 476
 477         if (jbt->state >= ARRAY_SIZE(jbt_state_names))
 478                 return -EIO;
 479
 480         return sprintf(buf, "%s\n", jbt_state_names[jbt->state]);
 481 }
 482
 483 static ssize_t state_write(struct device *dev, struct device_attribute *attr,
 484                            const char *buf, size_t count)
 485 {
 486         struct jbt_info *jbt = dev_get_drvdata(dev);
 487         int i, rc;
 488
 489         for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) {
 490                 if (!strncmp(buf, jbt_state_names[i],
 491                              strlen(jbt_state_names[i]))) {
 492                         rc = jbt6k74_enter_state(jbt, i);
 493                         if (rc)
 494                                 return rc;
 495                         return count;
 496                 }
 497         }
 498
 499         return -EINVAL;
 500 }
 501
 502 static DEVICE_ATTR(state, 0644, state_read, state_write);
 503
 504 static int reg_by_string(const char *name)
 505 {
 506         if (!strcmp(name, "gamma_fine1"))
 507                 return JBT_REG_GAMMA1_FINE_1;
 508         else if (!strcmp(name, "gamma_fine2"))
 509                 return JBT_REG_GAMMA1_FINE_2;
 510         else if (!strcmp(name, "gamma_inclination"))
 511                 return JBT_REG_GAMMA1_INCLINATION;
 512         else
 513                 return JBT_REG_GAMMA1_BLUE_OFFSET;
 514 }
 515
 516 static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
 517                           char *buf)
 518 {
 519         struct jbt_info *jbt = dev_get_drvdata(dev);
 520         int reg = reg_by_string(attr->attr.name);
 521         u16 val;
 522
 523         mutex_lock(&jbt->lock);
 524         val = jbt->reg_cache[reg];
 525         mutex_unlock(&jbt->lock);
 526
 527         return sprintf(buf, "0x%04x\n", val);
 528 }
 529
 530 static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
 531                            const char *buf, size_t count)
 532 {
 533         struct jbt_info *jbt = dev_get_drvdata(dev);
 534         int reg = reg_by_string(attr->attr.name);
 535         unsigned long val = simple_strtoul(buf, NULL, 10);
 536
 537         dev_info(dev, "**** jbt6k74 writing gama %lu\n", val & 0xff);
 538
 539         jbt_reg_write(jbt, reg, val & 0xff);
 540
 541         return count;
 542 }
 543
 544 static ssize_t reset_write(struct device *dev, struct device_attribute *attr,
 545                            const char *buf, size_t count)
 546 {
 547         struct jbt_info *jbt = dev_get_drvdata(dev);
 548         struct jbt6k74_platform_data *jbt6k74_pdata = jbt->spi_dev->dev.platform_data;
 549         int rc;
 550
 551         dev_info(dev, "**** jbt6k74 reset\n");
 552
 553         /* hard reset the jbt6k74 */
 554
 555         (jbt6k74_pdata->reset)(0, 0);
 556         mdelay(1);
 557         (jbt6k74_pdata->reset)(0, 1);
 558         mdelay(120);
 559
 560         rc = jbt_reg_write_nodata(jbt, 0x01);
 561         if (rc < 0)
 562                 dev_err(dev, "cannot soft reset\n");
 563
 564         mdelay(120);
 565
 566         jbt->state = JBT_STATE_DEEP_STANDBY;
 567
 568         switch (jbt->last_state) {
 569         case JBT_STATE_QVGA_NORMAL:
 570                 jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
 571                 break;
 572         default:
 573                 jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 574                 break;
 575         }
 576
 577         rc = jbt6k74_display_onoff(jbt, 1);
 578         if (rc < 0)
 579                 dev_err(dev, "cannot switch display on\n");
 580
 581         return count;
 582 }
 583
 584 static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
 585 static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
 586 static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
 587 static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
 588 static DEVICE_ATTR(reset, 0600, NULL, reset_write);
 589
 590 static struct attribute *jbt_sysfs_entries[] = {
 591         &dev_attr_state.attr,
 592         &dev_attr_gamma_fine1.attr,
 593         &dev_attr_gamma_fine2.attr,
 594         &dev_attr_gamma_inclination.attr,
 595         &dev_attr_gamma_blue_offset.attr,
 596         &dev_attr_reset.attr,
 597         NULL,
 598 };
 599
 600 static struct attribute_group jbt_attr_group = {
 601         .name   = NULL,
 602         .attrs  = jbt_sysfs_entries,
 603 };
 604
 605 static int fb_notifier_callback(struct notifier_block *self,
 606                                 unsigned long event, void *data)
 607 {
 608         struct jbt_info *jbt;
 609         struct fb_event *evdata = data;
 610         int fb_blank;
 611
 612         if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
 613                 return 0;
 614
 615         fb_blank = *(int *)evdata->data;
 616         jbt = container_of(self, struct jbt_info, fb_notif);
 617
 618         switch (fb_blank) {
 619         case FB_BLANK_UNBLANK:
 620                 dev_info(&jbt->spi_dev->dev, "**** jbt6k74 unblank\n");
 621                 break;
 622         case FB_BLANK_NORMAL:
 623                 dev_info(&jbt->spi_dev->dev, "**** jbt6k74 normal\n");
 624                 /*jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 625                 jbt6k74_display_onoff(jbt, 1); */
 626                 break;
 627         case FB_BLANK_VSYNC_SUSPEND:
 628                 dev_info(&jbt->spi_dev->dev, "**** jbt6k74 vsync suspend\n");
 629                 break;
 630         case FB_BLANK_HSYNC_SUSPEND:
 631                 dev_info(&jbt->spi_dev->dev, "**** jbt6k74 hsync suspend\n");
 632                 /* FIXME: we disable SLEEP since it would result in
 633                  * a visible artefact (white screen) before the backlight
 634                  * is dimmed to a dark enough level */
 635                 /* jbt6k74_enter_state(jbt, JBT_STATE_SLEEP); */
 636                 /*jbt6k74_display_onoff(jbt, 0);*/
 637                 break;
 638         case FB_BLANK_POWERDOWN:
 639                 dev_info(&jbt->spi_dev->dev, "**** jbt6k74 powerdown\n");
 640                 /*jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);*/
 641                 break;
 642         }
 643
 644         return 0;
 645 }
 646
 647 /* linux device model infrastructure */
 648
 649 static int __devinit jbt_probe(struct spi_device *spi)
 650 {
 651         int rc;
 652         struct jbt_info *jbt;
 653         struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
 654
 655         /* the controller doesn't have a MISO pin; we can't do detection */
 656
 657         spi->mode = SPI_CPOL | SPI_CPHA;
 658         spi->bits_per_word = 9;
 659
 660         rc = spi_setup(spi);
 661         if (rc < 0) {
 662                 dev_err(&spi->dev,
 663                         "error during spi_setup of jbt6k74 driver\n");
 664                 return rc;
 665         }
 666
 667         jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
 668         if (!jbt)
 669                 return -ENOMEM;
 670
 671         jbt->spi_dev = spi;
 672         jbt->state = JBT_STATE_DEEP_STANDBY;
 673         mutex_init(&jbt->lock);
 674
 675         dev_set_drvdata(&spi->dev, jbt);
 676
 677         /* hard reset the jbt6k74 */
 678
 679         (jbt6k74_pdata->reset)(0, 0);
 680         mdelay(1);
 681         (jbt6k74_pdata->reset)(0, 1);
 682         mdelay(120);
 683
 684         rc = jbt_reg_write_nodata(jbt, 0x01);
 685         if (rc < 0)
 686                 dev_err(&spi->dev, "cannot soft reset\n");
 687
 688         mdelay(120);
 689
 690
 691         rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 692         if (rc < 0) {
 693                 dev_err(&spi->dev, "cannot enter NORMAL state\n");
 694                 goto err_free_drvdata;
 695         }
 696
 697         rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
 698         if (rc < 0) {
 699                 dev_err(&spi->dev, "cannot create sysfs group\n");
 700                 goto err_standby;
 701         }
 702
 703         jbt->fb_notif.notifier_call = fb_notifier_callback;
 704         rc = fb_register_client(&jbt->fb_notif);
 705         if (rc < 0) {
 706                 dev_err(&spi->dev, "cannot register notifier\n");
 707                 goto err_sysfs;
 708         }
 709
 710         return 0;
 711
 712 err_sysfs:
 713         sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
 714 err_standby:
 715         jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
 716 err_free_drvdata:
 717         dev_set_drvdata(&spi->dev, NULL);
 718         kfree(jbt);
 719
 720         return rc;
 721 }
 722
 723 static int __devexit jbt_remove(struct spi_device *spi)
 724 {
 725         struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 726
 727         /* We don't want to switch off the display in case the user
 728          * accidentially onloads the module (whose use count normally is 0) */
 729
 730         fb_unregister_client(&jbt->fb_notif);
 731         sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
 732         dev_set_drvdata(&spi->dev, NULL);
 733         kfree(jbt);
 734
 735         return 0;
 736 }
 737
 738 #ifdef CONFIG_PM
 739 static int jbt_suspend(struct spi_device *spi, pm_message_t state)
 740 {
 741         struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 742
 743         /* Save mode for resume */
 744         jbt->last_state = jbt->state;
 745
 746         jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
 747
 748         jbt->have_resumed = 0;
 749
 750 /*      (jbt6k74_pdata->reset)(0, 0); */
 751
 752         dev_info(&spi->dev, "**** jbt6k74 suspend end\n");
 753
 754         return 0;
 755 }
 756
 757 int jbt6k74_resume(struct spi_device *spi)
 758 {
 759         struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 760         struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
 761         int rc;
 762
 763         dev_info(&spi->dev, "**** jbt6k74 resume start\n");
 764
 765         /* hard reset the jbt6k74 */
 766
 767         (jbt6k74_pdata->reset)(0, 0);
 768         mdelay(1);
 769         (jbt6k74_pdata->reset)(0, 1);
 770         mdelay(120);
 771
 772         rc = jbt_reg_write_nodata(jbt, 0x01);
 773         if (rc < 0)
 774                 dev_err(&spi->dev, "cannot soft reset\n");
 775
 776         mdelay(120);
 777
 778         jbt->state = JBT_STATE_DEEP_STANDBY;
 779
 780         switch (jbt->last_state) {
 781         case JBT_STATE_QVGA_NORMAL:
 782                 jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
 783                 break;
 784         default:
 785                 jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 786                 break;
 787         }
 788
 789         rc = jbt6k74_display_onoff(jbt, 1);
 790         if (rc < 0)
 791                 dev_err(&spi->dev, "cannot switch display on\n");
 792
 793         if (jbt6k74_pdata->resuming)
 794                 (jbt6k74_pdata->resuming)(0);
 795
 796         dev_info(&spi->dev, "**** jbt6k74 resume end\n");
 797
 798         return 0;
 799 }
 800 EXPORT_SYMBOL_GPL(jbt6k74_resume);
 801
 802 #else
 803 #define jbt_suspend     NULL
 804 #define jbt_resume      NULL
 805 #endif
 806
 807 static struct spi_driver jbt6k74_driver = {
 808         .driver = {
 809                 .name   = "jbt6k74",
 810                 .owner  = THIS_MODULE,
 811         },
 812
 813         .probe   = jbt_probe,
 814         .remove  = __devexit_p(jbt_remove),
 815         .suspend = jbt_suspend,
 816         .resume  = jbt6k74_resume,
 817 };
 818
 819 static int __init jbt_init(void)
 820 {
 821         return spi_register_driver(&jbt6k74_driver);
 822 }
 823
 824 static void __exit jbt_exit(void)
 825 {
 826         spi_unregister_driver(&jbt6k74_driver);
 827 }
 828
 829 MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
 830 MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
 831 MODULE_LICENSE("GPL");
 832
 833 module_init(jbt_init);
 834 module_exit(jbt_exit);